Demo Abstract: Low-power High-precision Timing Hardware for Sensor Networks [Demonstration]

NESL Technical Report #: 2009-9-1

Authors:

Abstract: In this demonstration, we will present three key technolo- gies we recently developed to improve time synchronization accuracy in sensor networks: (1) Temperature Driven Time Synchronization, (2) Low-Power Sub-μSecond Time Syn- chronization, and (3) Low-Power FPGA implementation of a High-Low Timer.

Publication Forum: SenSys

Date: 2009-11-16

Place: Berkeley

Public Document?: Yes

NESL Document?: Yes

Document category: Demonstration

Projects:

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